Electronic-Photonic Markets, Prospects for Standardization,
and the Consequences of Energy: A Roadmap Progress Report
Agenda
Monday, April 28, 2008 |
| 8:00 | Breakfast & Registration (Dining Room 5) |
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| Keynote: | Session I: Emerging High Volume Markets | |
| -Moderator: Alan Benner, Sr. Technical Staff Member, Systems & Technology Group, IBM Labs | ||
| 9:00 | Welcome | |
| -Lionel Kimerling, CTR Co-Director | ||
| 9:15 | Intel Connects Cables - Potential uses and Infiniband | |
| -Tom Rossi, Strategic Relations Manager, Systems & Technology Group, Intel | ||
| 10:00 | Comparison of Bandwidth Limits for On-Card Electrical and Optical Interconnects for 100Gb/s and Beyond | |
| -Petar Pepeljugoski, Research Staff Member, IBM Labs | ||
| 10:45 | Trends in Datacom Component Markets | |
| -Karen Liu, VP of Components, Ovum RHK | ||
| 11:30 | Overcoming the Bottleneck of Energy Consumption | |
| -Shu Namiki, Sr. Research Scientist, The National Institute of Advanced Industrial Science & Technology (Japan) | ||
12:15 pm Lunch (Dining Rooms East & West) |
Session II: Technology Working Group Focus - Integration, Packaging & Interconnect |
| 1:30 | TWG Overview & Goals | |
| -Richard Grzybowski, Research Director, Corning | ||
| 1:45 | Power and Thermal Considerations for Photonic Interconnects | |
| -Terry Morris, Fellow, Hewlett Packard | ||
| 2:15 | The Status and Future of High Performance Active Optical Cables | |
| -Stan Swirhun, Senior VP and GM, Optical Communications, Zarlink Semiconductor | ||
Session III: TWG Break-out Meetings (3:00 - 5:00pm) |
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| Integration, Packaging & Interconnect (Dining Room 2) |
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| Cross-Market Applications (Dining Room 3) Initial Results of the CTR Market Requirements Survey |
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| -Jonathan Lindsey, MIT CTR Fellow |
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| Si CMOS Platforms (Dining Room 6) Characterizing the Cost of Emerging Transceiver Designs: Implications for Material Platform Choice |
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| -Shan Liu, MIT CTR Fellow |
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| 5:00- 7:00 | Reception (Dining Rooms East & West) | |
Tuesday, April 29, 2008 |
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| 8:00 | Breakfast (Dining Room 5) | |
| 9:00 | Consortium Board Meeting (Closed to Consortium Members Only, Dining Room 6) | |
| -Jerry Bautista, Consortium Chair and Technology Management, Intel | ||
| Session IV: Technology Working Group Focus - Si CMOS Platform Moderator: Mike Morse, Principal Engineer, Intel |
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| 9:30 | TWG Overview & Goals | |
| -Lionel C. Kimerling, Co-Director, CTR | ||
| 9:45 | Monolithic Integration of Active Chipscale Photonic Networks in Si-CMOS | |
| -Mark Beals, Associate Director, Microphotonics Center, MIT | ||
| 10:15 | Nanophotonic Interconnect for High Performance Many Core Computation | |
| -Ray Beausoleil, Distinguished Scientist, Quantum Science Research HP Labs | ||
| 10:45 | High Speed Single Mode Transceivers for Multimode Fibers Removing the Modal Dispersion Limit | |
| -Shrenik Deliwala, Principal Photonic Engineer, Analog Devices | ||
| 11:15 | Break | |
| 11:30 | Report Back from TWG Sessions | |
| IPI TWG Report | ||
| Si CMOS TWG Report | ||
| Cross Market TWG Report | ||
| 12:00 | Paving the Road Ahead | |
| - Lionel Kimerling, CTR Co-Director & Randy Kirchain, CTR Co-Director | ||
| 12:30 | Meeting Conclusion | |
| View from the Faculty Club meeting room. Picture taken by Kazumi Wada |
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